The present invention relates to a method for fabricating a semiconductor device having a dual gate electrode, more specifically to a method for fabricating a semiconductor device which can prevent boron penetration from a p-type gate electrode without degrading performance of an n-channel MOS transistor.
With the recent increasing micronization and higher-speed operation of semiconductor devices, the so-called dual gate electrode including a p-type gate electrode which is the gate electrode of a p-channel MOS transistor doped with an acceptor impurity, and an n-type gate electrode which is the gate electrode of an n-channel MOS transistor doped with a donor impurity has been increasingly used. In the p-type gate electrode, boron (B) is widely used as a dopant. However, because of the large diffusion coefficient in the silicon oxynitride film, the thermal diffusion that thermal processing in a later step causes boron in the gate electrode to diffuse through the gate insulation film into the silicon substrate in the channel region is a problem. When the boron penetration is occurred, an impurity concentration in the silicon substrate of the channel region changes to cause characteristic degradation, as of varying a threshold voltage, lowering the impurity concentration in the gate electrode to deplete the gate electrode, or others. It is preferable to reduce the born penetration as much as possible.
On the other hand, in the processing for opening a contact hole in a narrow region between gate electrodes, the so-called self-aligned contact (SAC) technique is widely used from the viewpoint of ensuring an alignment margin for the lithography. In the SAC technique, the side surface and the upper surface of the gate electrodes are covered with a silicon nitride film having etching selectivity with respect to a silicon oxide film, which is widely used as an inter-layer insulation film, and the inter-layer insulation film is etched with the silicon nitride film as a stopper to thereby open the contact hole arriving at the substrate without exposing the gate electrodes in the contact hole. In the SAC technique, the silicon nitride film is thus formed on the gate electrodes. However, it is reported that thermal processing following the formation of the silicon nitride film on the p-type gate electrodes enhances the born penetration (see, e.g., J. R. Pfiester et al., IEEE Trans. Electron Devices, vol. 37, 1842 (1990)).
As described above, the boron penetration from the p-type gate electrode is conspicuous in case of forming a silicon nitride film on the gate electrodes especially by the SAC technique. A technique for preventing the boron penetration from the p-type gate electrode is required.
It is known that the boron penetration from the p-type gate electrode is reduced by introducing nitrogen in the gate insulation film. The gate insulation film is formed by using NO or N2O, or thermal processing is made in a gas atmosphere of NO, N2O or NH3 after the gate insulation film has been formed, whereby a gate oxide film of a silicon oxynitride film containing nitrogen by about 10% is formed to prevent the boron penetration. However, in a case that the gate insulation film is formed of a silicon oxynitride film, the incorporated nitrogen is segregated in the interface between the silicon substrate and the gate insulation film, and surface state increase, which is result in lowering driving performance of the n-channel MOS transistors. Furthermore, increased nitrogen concentration increases fixed charges in the film, and an accordingly larger channel dose of the n-channel MOS transistor is necessary, often with results that the performance of the transistor has been degraded, and dopant concentration increase in the substrate has increased junction leakage current.
The Japanese Patent Application Laid-Open Publication No. 2000-12856, for example, discloses a technique of setting a temperature of thermal processing made after a silicon nitride film has been formed to be below a temperature at which can be prevented from the enhanced diffusion of boron. However, in order to prevent the enhanced diffusion of boron a temperature of thermal processing following the formation of the silicon nitride film must be set to be below about 900xc2x0 C. The thermal processing at such low temperature is not sufficient to activate the source/drain diffusion, with a result of lower driving performance of the transistor.
As described above, in the conventional method for fabricating the semiconductor device, the prevention of the boron penetration from the p-type gate electrode degrades driving performance of the n-channel MOS transistor. A technique which can prevent the boron penetration from the p-type gate electrode without degrading performance of the n-channel MOS transistor has been required.
It is an object of the present invention to provide a method for fabricating the semiconductor device including a dual gate electrode which can prevent the boron penetration from the p-type gate electrode without lowering performance of the n-channel MOS transistor.
According to one aspect of the present invention, there is provided a method for fabricating the semiconductor device comprising the steps of: forming a gate insulation film on a semiconductor substrate; forming on the gate insulation film a conducting film including a semiconductor film containing boron as an acceptor impurity in at least one region; forming on the conducting film an insulation film including a silicon nitride film having an Sixe2x80x94H bond concentration immediately after deposited, which is below 4.3xc3x971020 cmxe2x88x923 measured by FT-IR; and patterning the insulation film and the conducting film to form a gate electrode of the conducting film having the upper surface covered by the insulation film.
According to another aspect of the present invention, there is provided a method for fabricating the semiconductor device comprising the steps of: forming a gate insulation film on a semiconductor substrate; forming on the gate insulation film a conducting film including a semiconductor film containing boron as an acceptor impurity in at least one region; patterning the conducting film to form a gate electrode of the conducting film; and forming on the side wall of the gate electrode a sidewall insulation film including a silicon nitride film having an Sixe2x80x94H bond concentration immediately after deposited, which is below 4.3xc3x971020 cmxe2x88x923 measured by FT-IR.
According to the present invention, the silicon nitride film covering the upper surfaces and/or the side walls of the gate electrodes are deposited under conditions which allow an Sixe2x80x94H bond concentration in the silicon nitride film immediately after deposited to be below a 4.3xc3x971020 cmxe2x88x923 measured by FT-IR, whereby release of hydrogen in the films in the thermal processing after the silicon nitride films have been formed, and the boron penetration from the p-type gate electrode can be suppressed. Thus, in the p-channel MOS transistor a dopant concentration in the silicon substrate in the channel region is prevented from changing to resultantly deviate a threshold voltage, or a dopant concentration in the gate electrode is prevented from changing to resultantly deplete the gate electrode. Thus, characteristic degradation can be prevented. A nitrogen concentration in the silicon oxynitride film forming the gate insulation film can be lowered, whereby the boron penetration from the p-type gate electrode can be prevented without lower driving performance of the n-channel MOS transistor.